December 2017: The Future of Microprocessors

Welcome to the December 2017 edition of the Embedded Artistry Newsletter!

This month I'd like to share my research on interesting innovations and research projects that will affect the future of microcontroller design and manufacturing.

The Future of Microprocessor Development and Manufacturing

In the past few months I've written to you about Intel's new FinFET transistor and "hyperscaling" chip design techniques and new DARPA electronic initiatives. I want to share my research on other innovations and programs that will affect microprocessor design and manufacturing.

Bespoke Processors

Most processors designed today are "general purpose" and meant to support a wide range of applications. By relying on general purpose processors, the manufacturing ecosystem can take advantage of economies of scale and enjoy reduced component costs. Even in situations where generic processors are too powerful for our specific application, it's cheaper to purchase an overpowered processor than it is to design an application-specific one.

Over-design is still costly, as unused features still have an impact on product size and power consumption. A research team at the University of Minnesota is investigating methods for identifying unused peripherals and logic gates in these generic processors. The team found that many of their test applications (e.g. FFT, autocorrelation, interpolation filtering) only used about 60% of the logic gates. They then created "bespoke" application-specific processors that removed completely unused circuitry. The resulting chip designs were on average 62% smaller and 50% lower-power than the starting openMSP430 microcontroller design. Since this effort is still early in its development, the solution is not yet cost-effective or manufacturable. However, it does allude to a future where we can create small, low-power, application-specific processors.

More on bespoke processors:

Embedded FPGAs

Field Programmable Gate Array (FPGA) technology allows for designers to describe a hardware/chip design using a programming language such as Verilog or VHDL. Traditionally FPGAs have been expensive, standalone components that are part of a hardware design. However, chip designers are increasingly making use of "embedded FPGAs" (eFPGA) in new microcontroller designs. In fact, you may already be using a chip with eFPGA technology without realizing it!

An embedded FPGA is an IP block that allows an FPGA to be integrated into a microcontroller design. Unlike standalone FPGA chips, eFPGAs rely on normal digital interconnects instead of supporting PHYs and I/O interfaces. eFPGA IP blocks provide the same benefits as standalone FPGAs (such as reprogrammability), but their tight coupling inside of the processor can result in higher communication speed and lower power consumption.

Embedded FPGAs provide a variety of chip design benefits:

  • Reduced impact of design changes - instead of expensive RTL changes, software can be updated
  • Reprogrammable and configurable I/O - allowing a single design to support a variety of I/O combinations (GPIO, UART, USART, I2C, I2S, SPI, etc.)
  • Offloading I/O processing from the MCU
  • Dramatically improved hardware accelerator performance (e.g. AES, SHA, FFT, JPEG encoding)
  • Creating reconfigurable hardware accelerators or implementing multiple accelerators using one mask
  • Maximizing battery life by implementing repetitive DSP/processor operations in a more efficient manner

While designers are primarily using eFPGAs to improve flexibility and reduce the impact of RTL changes, I look forward to a time when we will be able to program eFPGAs directly to maximize performance in our applications.

More on eFPGAs:

Embedded DARPA Initiatives

We covered two new DARPA efforts in October: 3DSoC, which is focused on creating design strategies for 3D circuit layouts; and FRANC, which seeks to overturn the Von Neumann architecture and create a new method for handling memory and logic operations. The other new DARPA initiatives are focused on improving the SoC design process to create a new era of innovation in electronics and application-specific designs:

  • Intelligent Design of Electronic Assets (IDEA) is focused on creating a design framework to enable non-experts to quickly design new complex electronics, including mixed-signal ICs, system-in-package modules, and PCBs
  • Posh Open Source Hardware (POSH) is focused on creating an open-source hardware design and verification framework to simplify SoC development
  • Software Defined Hardware (SDH) is exploring technology to create and improve reconfigurable software and hardware systems for use in data-intensive real-time processing applications, such as autonomous driving
  • Domain-Specific System on a Chip (DDSoC) is focused on creating a single platform to create and program SoCs for application-specific needs

More on the new DARPA initiatives:

Plastic Processors

Researchers at ARM and PragmatIC have been working on PlasticARM, a project focused on creating cheap, disposable micro-controllers printed on plastic. PlasticARM is based on the ARM Cortex-M0 32-bit SoC and currently uses a 2 micron process. The ARM team is also working with the University of Minnesota team to use the bespoke processor technique to reduce size and complexity of the resulting chips.

While not bleeding edge computationally, plastic chips will benefit from an estimated 90% lower IC cost than silicon chips. Plastic chips can also be flexible, thinner than a human hair, and have no rigid interconnection points. This could lead to interesting use cases, such as:

  • Disposable packaging displays
  • Sensors around water pipes to record average water pressure
  • Sensors around gas pipes to detect leaks
  • Sensors telling you whether your food is rancid or not
  • Pill bottle displays telling you whether you forgot to take your pills

More on plastic processors:

Lithographic Printing

Silicon chips are currently produced using the complex photolithographic printing process. Photoresist material is applied to a silicon wafer and spun at high speeds to produce a uniform layer. The photoresist is cured using UV light, and some of the photoresist is removed by a special solution. Afterward, a chemical etching process removes the uppermost substrate layer wherever the wafer is not protected by photoresist. This process is repeated to produce patterned layers of various materials that eventually result in a wafer of functional chips.

Molecular Imprints is a company working on utilizing imprint lithography (IL) to stamp out chips using a process similar to a printing press. Photoresist is applied to the silicon wafer using a method similar to inkjet printing. Then a glass stamp with the etching pattern is lowered onto the wafer, and the stamp draws the photoresist into its grooves via capillary action. Since the stamp is glass, the resist can be cured with UV light while the stamp is still on the wafer.

While there are still quality control problems to solve, the IL process is much simpler than photolithographic printing: simply spray photoresist, check alignment, stamp the wafer, and repeat. While Molecular Imprints is initially targeting hard drive production, I expect we will see printed processors soon enough.

More on Imprint Lithography:

Around the Web

Phil Koopman, of Better Embedded Software has made the course notes for his new embedded software college course publicly available. The course covers code quality, safety, and security. You can also find the course materials on the CMU course website.

Want to get started with ARM assembly? Check out this excellent 7-part series by Azeria Labs covering ARM assembly basics.

Embedded.com took a look at how embedded software development has evolved. Using surveys collected over the past twenty years, they explore evolutions in programming languages, processor usage, OS usage, and more.

Popular Articles

These were the most popular Embedded Artistry articles in November:

  1. Circular Buffers in C/C++
  2. Installing LLVM/Clang on OSX
  3. Implementing Malloc: First-fit Free List
  4. An Overview of C++ STL Containers
  5. std::string vs C-strings
  6. A GitHub Pull Request Template for Your Projects
  7. Creating and Enforcing a Code Formatting Standard with clang-format
  8. clang-format Wrapper Script Examples
  9. Implementing an Asynchronous Dispatch Queue
  10. A GitHub Issue Template for Your Projects

Thanks for Reading!

Have any feedback, suggestions, interesting articles, or resources to recommend to other developers? Respond to this email and let me know!

While you wait on the next edition, check out our website.

Happy hacking!


October 2017

Welcome to the October 2017 edition of the Embedded Artistry Newsletter! This is a monthly newsletter of curated and original content to help you build better embedded systems. This newsletter is intended to supplement the website and covers topics not mentioned there.

This month we'll be covering:

  • The BlueBorne Bluetooth vulnerability
  • DARPA funds embedded initiatives
  • A helpful introductory RTOS series
  • Amazon launches an FPGA cloud
  • A terrible security flaw discovered in pacemakers
  • Limiting the number of characters printf displays

The BlueBorne Bluetooth Vulnerability

Armis Labs recently announced a series of eight attack vectors that endanger the majority of our Bluetooth devices, including Android, iOS (pre-10.0), Windows, and Linux. The threat is dubbed "BlueBorne", a blend between Bluetooth and airborne. Affected devices are vulnerable to BlueBorne as long as Bluetooth is enabled, even if the device is not discoverable and not paired to the attacker's device. BlueBorne does not require any action to be completed by the user, and the user may never know his device has been compromised. The disclosed vulnerabilities are fully operational and enable a variety of attacks, such as arbitrary code execution, man-in-the-middle, and information leakage.

Bluetooth is a nearly ubiquitous technology and Armis estimates that over 8.2 billion devices may already be affected. Popular libraries like BlueZ which is used on a variety of PC and embedded systems are compromised. It is recommended to turn off Bluetooth when you are not using it until the vulnerabilities have been addressed. Ensure your software is up-to-date and keep an eye out for software updates on your Bluetooth-enabled systems. If you are building a Bluetooth-enabled system, review the technical paper and ensure that your design is not suspect to the disclosed vulnerabilities.

For more on BlueBorne:

DARPA Funds Embedded Initiatives

DARPA has announced that it is providing funding for six new programs with an embedded focus. DARPA is focusing the new initiatives on researching new materials and integration techniques, improving circuit design tools, and creating new system architectures for microelectronics. The programs that sound the most exciting are in the Materials and Integration category: "Three-dimensional Monolithic System-on-a-chip" (3DSoC) and "Foundations Required for Novel Compute" (FRANC).

3DSoC is aimed at improving speeds and reducing power consumption by transitioning from a 2D circuit layout to a 3D circuit layout. By constructing microelectronic circuits in 3D space (e.g. in a cube) we can create novel design strategies and arrangements for our circuits and chips. Migrating to a 3D circuit arrangement is expected to improve logic density, increase computational speed, optimize for size, and reduce power.

FRANC is looking to overturn John von Neumann's computer architecture model which separates the memory and processing blocks. Computations are often limited by the speed at which data can be moved back-and-forth between the processor and memory. As a result, memory transfer speeds are a major bottleneck in many systems. FRANC's aim is to address this bottleneck by developing a new method for handling memory and logic in a combined manner.

It's exciting to see DARPA inducing major changes in our microelectronic circuits and system architectures. Innovations like these will have a significant impact on our industry in the coming decades.

More on DARPA's new initiatives:

An Introductory RTOS Series

The embedded guru Colin Walls has been working on a series called RTOS Revealed. This series of articles is a great way to learn more about real-time and OS concepts, multi-threaded scheduling, and how to use an RTOS. Colin covers basic RTOS concepts and dives into the Nucleus SE RTOS to provide concrete examples. I recommend reviewing the entire series if you are new to the embedded systems space.

Here's the current lineup of articles:

New articles in the series are released on a monthly cadence.

Amazon Launches an FPGA Cloud

Xilinx and Amazon have partnered to launch customizable FPGA instances in the AWS Cloud for applications that can benefit from hardware acceleration. These instances are built on the Xilinx Virtex UltraScale+ FPGAs and can include up to eight FPGAs per instance. Amazon also provides an FPGA Hardware Developer Kit (HDK) to simplify development of FPGA instances.

A Terrible Flaw Discovered in Pacemakers

465,000 U.S. patients have been told to visit a clinic to receive a firmware update for their St. Jude pacemakers. The firmware contains a security flaw which allows hackers within radio range to take control of a pacemaker. This is one more example demonstrating that security must be a crucial aspect of embedded systems design and development. Taking security shortcuts never pays.

Limiting the Number of Characters printf Displays

I originally hesitated about sharing this tip, but I've found myself repeatedly it: You can control how many characters printf spits out for the %s symbol by specifying a precision.

There are two options for controlling the length. You can specify the maximum using a fixed value:

// Fixed precision in the format string
const char * mystr = "This string is definitely longer than what we want to print.";
printf("Here are first 5 chars only: %.5s\n", mystr);

You can also control the length programmatically by using an asterisk (*) in the format string instead of the length. The length is then specified as an argument and is placed ahead of the string you want to print.

// Only 5 characters printed. When using %.*s, add an argument to specify the length before your string
printf("Here are the first 5 characters: %.*s\n", 5, mystr);

Website Updates

This month, the website went through a total visual redesign!

Old pages such as "Around the Web" have been split out into separate pages to provide better categorization:

I've also added some new pages in the "About" section:

These were the most popular articles in September:

  1. Installing Clang/LLVM on OSX
  2. Circular Buffers in C/C++
  3. C++11 Fixed Point Arithmetic Library
  4. An Overview of C++ STL Containers
  5. std::string vs C-strings

Goodbye to a Dear Friend

We lost our dear companion and beloved mascot Jensen to stomach cancer. She will be sorely missed.


Thanks for Reading!

Have any feedback, suggestions, interesting articles, or resources to recommend to other developers? Respond to this email and let me know!