This standard documents the function calling conventions that are used by the compiler when using ARM assembly.
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Current Program Status Register [CPSR]
ARM Processor Register. The CPSR holds information about the most recently performed ALU operation , controls the enabling and disabling of interrupts , and sets the processor operating mode.
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Vector Floating Point [VFP]
VFP is a FPU coprocessor extension to the ARM instruction set. It provides single- and double- precision floating point computation support.
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Platform-Security Architecture
The Platform Security Architecture (PSA) is an ARM framework for securing connected devices.
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Nested Vector Interrupt Controller [NVIC]
Interrupt controller present on some ARM cores, such as the Cortex-M3.
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Cortex-R
“ARM processor family. Targeted for hard real-time and safety-critical applications. Similar to the Cortex-A line for application processing. The R indicates the processor matches the ‘Real-time’ architecture profile.”
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Cortex-M
“ARM processor family. Smallest and lowest power processors available by ARM. The M indicates the processor matches the ‘Microcontroller’ architecture profile.”
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Cortex-A
“ARM processor family. Application processors with increased capabilities, typically able to run a full operating system such as Linux. The A indicates the processor matches the ‘Application’ architecture profile.”
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Bipolar Junction Transistor [BJT]
A bipolar junction transistor (bipolar transistor or BJT) is a type of transistor that uses both electrons and holes as charge carriers.
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Bus Fault Address Register [BFAR]
An ARM register that contains the address of the location that generated a BusFault.
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